instruction address

英 [ɪnˈstrʌkʃn əˈdres] 美 [ɪnˈstrʌkʃn əˈdres]

网络  指令地址

计算机



双语例句

  1. Similarly, whenever the processor develops an instruction address, the low-order two bits are zero.
    同样,只要处理器利用指令地址,低阶的两位就为零。
  2. The first instruction does the load and the second instruction rotates the value so that the requested address is at the beginning of the register.
    第一个指令负责加载,第二个指令旋转此值以便所请求的地址位于寄存器的开始。
  3. If you can obtain a failing instruction address, follow these steps to isolate the failing method
    如果您可以获得一个错误指令地址,请遵循以下步骤来隔离失效的方法
  4. Hbr hint_trigger,$ register& This tells the processor that the branch instruction at the relative address hint_trigger is likely to branch to the address specified in register$ register.
    hbrhinttrigger,$register&告诉处理器相对地址hinttrigger处的分支指令可能会跳转到寄存器$register所指定的地址。
  5. Iar-The instruction address register.
    iar-指令地址寄存器。
  6. Note that you used the ila instruction(" immediate load address") to load the address of the buffer.
    注意,这里使用了ila指令(意思是“immediateloadaddress”)来加载缓冲区的地址。
  7. It only cares that the ones and zeros are consistent with its instruction set and address space.
    它只关心这些零一指令是否与其指令集和地址空间一致。
  8. In this mode, the instruction itself contains the address from which to load the data.
    在这种模式中,指令本身就包含了数据加载的源地址。
  9. The cbd instruction takes an address and generates a control word that can be used by shufb to insert a byte at the proper location in the quadword for that address.
    cbd指令接受一个地址并会生成一个控制字,而该控制字可被shufb用来为该地址在四字里的合适地址插入一个字节。
  10. If you find a function address range that covers the failing instruction address, the message for that range indicates the method where the error was likely introduced.
    如果您找到一个函数地址范围包含了失败的指令地址,那么这个范围的消息就会说明可能引入错误的方法。
  11. So this instruction stores the link register ( which holds the return address) into the proper location in the calling function's stack frame.
    所以该指令会将链接寄存器(存有返回地址)存储到调用函数堆栈框架的恰当位置。
  12. This is silly, because I should still be able to set a breakpoint based on the instruction address.
    这是愚蠢的,因为我仍然可以设置的指令地址的一个断点。
  13. Instruction address: The address that contains the location of another which is to be referred to.
    指令地址:标记的位置,是另一个需要引用的地址。
  14. After every instruction fetch, if we increment this address, it will accurately point to the next instruction in the sequence.
    在每次取指令后,如果我们使地址增量,那么就会准确地指向指令代码序列中的下一条指令。
  15. Whenever an instruction is fetched from memory, the instruction pointer is translated via the instruction TLB into a physical address.
    无论何时从内存中取一个指令,指令指针都会经指令TLB的翻译后指向物理地址。
  16. If you specify a delta, the number specified will be added to the current instruction pointer or specified address to begin disassembling.
    如果指定了增量,则指定的数目将添加到当前指令指针或指定地址以开始反汇编。
  17. A method of addressing in which the address part of an instruction contains a relative address.
    一种寻址方法,按照这种寻址法,指令的地址部分存放的是相对地址。
  18. In computer programming, a high level language instruction that retrieves a value from a program specified memory address location.
    在计算机程序设计中的一条高级语言指令,用来从程序指定的内存地址单元中取出一个值。
  19. An instruction that contains three address parts. The plus one address is the address of the next instruction to be executed unless otherwise specified.
    一种包含三个地址部分、加上一个下一条要执行指令的地址(除非另有说明)的指令。
  20. An instruction format containing four address parts.
    一种包括四个地址部分的指令格式。
  21. An instruction code containing no instruction code for the following address.
    一种不含后续地址的指令代码。
  22. Break execution when the program reaches the instruction at this address.
    程序执行到该地址处的指令时,中断执行。
  23. It will become the basis of Shared Bus. Though the analysis about the PowerPC Bus, there are four parts in BIU: Instruction Pretreatment Part, Address Bus Treatment Part, Data Bus Treatment Part and Data Pos-treatment Part.
    通过对PowerPC结构的总线协议的分析,总线接口部分主要由指令预处理部分、地址总线处理部分、数据总线处理部分和数据后处理部分组成,完成微处理器和外部总线的数据交互。
  24. ARM system structure inherits such characters of RISC ( Reduced Instruction Set Computer) as load/ store structure, fixed 32 bit instruction and format of three address instruction.
    ARM体系结构继承了RISC结构的加载/存储体系结构、固定长32位指令和三地址指令格式等特性。
  25. During the test, some problems of the algorithm were found, and then an improved method was given and it removed the feature of instruction bundle, supplied a unique virtual address to each instruction on which the decoder acted.
    根据测试中发现该算法存在的问题,提出了改进方案,消除束的特性,给每条指令赋予唯一地址并按此地址进行解码。
  26. Jump instruction can control the access value of PC, so the destination address can be got directly;
    跳转指令可以控制PC的取值,直接寻找到目标地址;
  27. Instruction IP address of LAN
    认识局域网中的IP地址
  28. In order to solve the problems about unfixed instruction length, stack-orientation and addressing virtualization in JVM instruction set, the instruction fetch unit, stack cache and mechanism of address translation in Java chip system are studied.
    为了解决Java虚拟机指令系统中指令不定长、面向堆栈和地址虚拟化等问题,本文研究了Java芯片中取指部件、堆栈缓冲部件和地址转换机制以及相应物理存储器的管理等关键技术。
  29. The research on branch prediction includes the use of history information, branch instruction address mapping and state transition.
    分支预测算法的研究包括分支历史信息的处理,分支指令地址的映射,状态转换等。
  30. Complier time translation algorithm is adopted for instruction and data region, this algorithm only access the address translation table in the translation state to eliminate the complex address translation in the execution state.
    对于指令区和数据区访问采取编译时地址转换算法,该算法仅在翻译态时访问地址转换表实现地址转换,消除运行态时复杂地址转换操作。